Exemplary embodiments relate to a logic gate. A logic gate may, for example, be used in dynamic logic circuits and drivers which are recently developed logic circuits designed for high-speed digital electronics, particularly computer CPUs. Logic circuits may comprise logic gates to form combinational logic paths for usage in FPGA, PLD or micro processor circuits of data processing systems. Logic gates may be applied in decoding circuits, for example, address decoding circuits or other circuits performing Boolean operations. Logic gates comprise transistors for realizing logic functions and may be implemented as a semiconductor circuit on a semiconductor wafer. The transistors may be realized in a CMOS semiconductor process.
Logic gates being applied in dynamic logic circuits comprise an enable signal for setting the logic gate in a precharged state and a successive evaluation state. The enable signal may be provided by a clock line. Logic gates may be implemented in Domino logic, which is a popular (CMOS-based) implementation of dynamic logic, developed to speed up circuits.
Dynamic logic circuits performing a two-phase calculation (precharge phase followed by evaluation phase) should be carefully designed with respect to transistor dimensions. Misadjustments may result in driver conflicts during a transition between the two phases which may cause short-circuit currents damaging the whole circuit. Dimensioning of transistors of dynamic logic circuits with respect to charge balance, chip area, power dissipation and robustness against disturbing influences becomes a risk for the functionality of the circuit, especially at low supply voltages and for high transistor threshold voltages (VTs). For dynamic logic circuits susceptibility to failure is stronger depending on the circuit design tha for static logic circuits.